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Dr. S.C. Jain

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Faculty Profile

Dr. S.C. Jain
Designation Professor.
Qualifications M.Tech. Ph.D.
Contact Detail :
Email [email protected]
Phone No. 9413945242
Research Interests

VLSI Design, Real Time Systems, Advanced Algorithms 
Brief Research Profile

 Journal Publication Details:
S. N. Full Title of Publication Author/s Year Journal/Conference  name Page Nos.
1. Hybrid Multi-FPGA Board Evaluation by Permitting Limited Multi-Hop Routing Sushil Chandra Jain, Anshul Kumar, Sashi Kumar December, 2003 Design Automation for Embedded Systems, Kluwer Academic Publishers, Netherlands, Vol. 8, No. 4 309-326
2. Low Cost Design of Sequential Reversible Counters Shubham Gupta, Vishal Pareek & Dr. S. C. Jain November 2013 International Journal of Scientific & Engineering Research, Volume 4, No. 11 1234-1240
3. An Extended Approach for Online Testing of Reversible Circuits Anugrah Jain, Nitin Purohit and Sushil Chandra Jain December 2013 IOSR Journal of Computer Engineering, Vol. 15, No. 6 1-11
4. SQL Injection Attacks on Web Application Chandershekhar Sharma, S.C. Jain March 2014 International Journal of Advanced Research in Computer Science and Software Engineering 1268-1272
5. Reversible circuit: Opportunities and challenges Brajesh and Dr. S.C. Jain April 2014  International journal of  Engineering  And Technical Research 263-266

 Conference  Details: 

S. N. Full Title of Publication Author/s Year Journal/Conference  name Page Nos.
1. Evaluation of Various Routing Architectures of Multi-FPGA Boards Sushil Chandra Jain, Sashi Kumar, Anshul Kumar January, 2000 13th International Conference on VLSI Design-2000, Kolkata, India 262-267
2. Efficient Embedding of Partitioned Circuits onto Multi-FPGA Boards Sushil Chandra Jain, Anshul Kumar, Sashi Kumar August, 2000 10th International Conference on Field-Programmable Logic and Applications (FPL-2000) in Villach, Austria 201-210
3. Hybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop Routing Sushil Chandra Jain, Anshul Kumar, Sashi Kumar July, 2002 10th International Workshop Rapid System Prototyping RSP-2002, Darmastadt, Germany 66-73
4. Multi-hop routing of multi-terminal nets for evaluation of hybrid multi-FPGA boards S. C. Jain, A. Kumar, S. Kumar December, 2002 1st International Conference on Field-Programmable Technologies FPT-2002, Hong Kong 298-301
5. Towards Implementation of Fault Tolerant Reversible Circuits Anugrah Jain and Sushil Chandra Jain September 2013 1st IEEE Sponsored International Conference on Emerging Trends and Applications in Computer Science (ICETACS-2013), Shilong, Meghalaya, India 86-91
6. A Novel Realization of SequentialReversible Building Blocks Vishal Pareek, Shubham Gupta and Sushil Chandra Jain May 2014 FUTURE COMPUTING 2014, The Sixth InternationalConference on Future Computational Technologies and Applications, Venice, Italy 1-6
7. Analysis and Classification of SQL Injection Vulnerabilities and Attacks on Web Applications Chandershekhar Sharma, S.C. Jain August 2014 IEEE Int. Conf. on Advances in Engineering & Technology research(ICAETR-2014),Dr. virendra Swarup group of institutions, Unnao, India, 1-6
8. Realization of Sequential Reversible Circuit from Finite State Machine Shubham Gupta, Vishal Pareek and Sushil Chandra Jain August 2014 18th International Computer Science and Engineering Conference (ICSEC), IEEE, Thailand, 2014 458-463
9. Fault Tolerant and Testable Designs of Reversible Sequential Building Blocks Vishal Pareek, Shubham Gupta and Sushil Chandra Jain August 2014 18th International Computer Science and Engineering Conference (ICSEC), IEEE, Thailand, 2014 452-457
10. Secure and Energy Efficient Routing Algorithm in Wireless Sensor Networks Vinod Kumar Menaria, Deepak Soni, A. Nagaraju and S.C. Jain November 2014 IEEE(IC3I-2014) Mysore 118-123
11. Synthesis of Balanced Quaternary Reversible Logic Circuit Jitesh Kumar Meena, Sushil Chandra Jain, Hitesh Gupta and Shubham Gupta March 2015 IEEE International Conference on Circuit, Power and Computing Technologies (ICCPCT), Kanyakumari, Tamilnadu, 2015 Accepted
12. A New Gate for Low Cost Design of All-optical Reversible Logic Circuit Mukut Bihari Malav, Shubham Gupta and Sushil Chandra Jain March 2015 IEEE International Conference on Circuit, Power and Computing Technologies (ICCPCT), Kanyakumari, Tamilnadu, 2015 Accepted
13. Load Balancing in Fault-Tolerant Real-Time Systems for Periodic Task Scheduling Divya Jain and Sushil Chandra Jain March 2015 IEEE International Conference on Circuit, Power and Computing Technologies (ICCPCT), Kanyakumari, Tamilnadu, 2015 Accepted
14. Load Balancing Real-Time Periodic Task Scheduling Algorithm For Multiprocessor Environment Divya Jain and Sushil Chandra Jain March 2015 IEEE International Conference on Circuit, Power and Computing Technologies (ICCPCT), Kanyakumari, Tamilnadu, 2015 Accepted
15.  A Novel Gate For Realizing QCA based Logic Design Nitesh Gupta, Chotu Lal, Jitesh Kumar Meena and S.C Jain September 2015   IEEE International Conference on Computer Communication and Control (IC4-15), Medicaps Group of Institutions, Indore 2015 Accepted

 Seminar/Symposia/Workshop/Conference/STC Organized:

Professional Affiliation:
 Life Member – ISTE Fellow – Institute of Engineers India, Calcutta

Research Supervised: